Date Awarded


Document Type


Degree Name

Doctor of Philosophy (Ph.D.)


Computer Science


Xu Liu

Committee Member

Bin Ren

Committee Member

Weizhen Mao

Committee Member

Qun Li

Committee Member

Guoliang Jin


Modern computer systems have evolved to employ powerful parallel architectures, including multi-core processors, multi-socket chips, large memory subsystems, and fast network communication. Given such powerful hardware, developers rely on performance profiling and modeling to guide their performance optimization. However, performance optimization is facing new challenges on efficiency and accuracy with emerging computer systems. In this dissertation, we propose approaches to address these challenges. We first study memory contention in Non-Uniform Memory Access (NUMA) architectures. We present DR-BW, a new tool based on machine learning to identify bandwidth contention in NUMA architectures and provide optimization guidance. DR-BW collects performance data with low overhead (<10%), feeds the data into a novel machine learning model to identify contention achieving more than 96% accuracy, and associates the analysis results with both programs and significant data objects. Then, we study and fix inaccuracy measurement in modern profilers. We investigate multiple modern architectures and quantify the PMU instruction profiling inaccuracy in these architectures with mathematical modeling. Then we design a systematic framework to evaluate the impact of PMU inaccuracy to the profiling results. We propose a software-based technique to rectify the measurement inaccuracy raised by PMU and demonstrate its effectiveness. Our research reveals that profiling and modeling significantly benefit system performance improvement. In addition, modeling based profiling also help user understand the performance bottleneck and guides the performance optimization.


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